Changes between Version 16 and Version 17 of DreamPlug

Timestamp:

01/31/12 07:46:32 (12 years ago)

Author:

Rick van der Zwet

Comment:

--

DreamPlug

@@ -52 +52 @@
 
 {{{
+vell>> printenv
+bootcmd=setenv ethact egiga0; ${x_bootcmd_ethernet}; setenv ethact egiga1; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;
+bootdelay=3
+baudrate=115200
+x_bootcmd_ethernet=ping 192.168.2.1
+x_bootcmd_usb=usb start
+x_bootcmd_kernel=fatload usb 0 0x6400000 uImage
+x_bootargs=console=ttyS0,115200
+x_bootargs_root=root=/dev/sda2 rootdelay=10
+ethact=egiga0
+ethaddr=F0:AD:4E:00:74:14
+eth1addr=F0:AD:4E:00:74:15
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 524/4092 bytes
+}}}
+
+{{{
+Marvell>> dhcp 900000
+BOOTP broadcast 1
+DHCP client bound to address 192.168.10.100
+Using egiga0 device
+TFTP from server 192.168.10.1; our IP address is 192.168.10.100
+Filename '/mv5281/kernel.bin'.
+Load address: 0x900000
+Loading: #################################################################
+         #################################################################
+         #################################################################
+         ########################
+done
+Bytes transferred = 3214712 (310d78 hex)
+Marvell>> go 900000
+## Starting application at 0x00900000 ...
+ dtbp = 0xc0bedd60
+KDB: debugger backends: ddb
+KDB: current backend: ddb
+Copyright (c) 1992-2012 The FreeBSD Project.
+Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
+        The Regents of the University of California. All rights reserved.
+FreeBSD is a registered trademark of The FreeBSD Foundation.
+FreeBSD 9.0-RELEASE #0 r230587: Mon Jan 30 22:03:05 CET 2012
+    root@brahm.vanderzwet.net:/usr/obj/arm.arm/usr/src-releng-9.0/sys/SHEEVAPLUG arm
+CPU: Feroceon 88FR131 rev 1 (Marvell core)
+  DC enabled IC enabled WB enabled EABT branch prediction enabled
+  16KB/32B 4-way Instruction cache
+  16KB/32B 4-way write-back-locking-C Data cache
+real memory  = 536870912 (512 MB)
+avail memory = 519999488 (495 MB)
+SOC: Marvell 88F6281 rev A1, TClock 200MHz
+simplebus0: <Flattened device tree simple bus> on fdtbus0
+ic0: <Marvell Integrated Interrupt Controller> mem 0xf1020200-0xf102023b on simplebus0
+timer0: <Marvell CPU Timer> mem 0xf1020300-0xf102032f irq 1 on simplebus0
+Event timer "CPUTimer0" frequency 200000000 Hz quality 1000
+Timecounter "CPUTimer1" frequency 200000000 Hz quality 1000
+gpio0: <Marvell Integrated GPIO Controller> mem 0xf1010100-0xf101011f irq 35,36,37,38,39,40,41 on simplebus0
+rtc0: <Marvell Integrated RTC> mem 0xf1010300-0xf1010307 on simplebus0
+mge0: <Marvell Gigabit Ethernet controller> mem 0xf1072000-0xf1073fff irq 12,13,14,11,46 on simplebus0
+mge0: Ethernet address: f0:ad:4e:00:74:14
+miibus0: <MII bus> on mge0
+e1000phy0: <Marvell 88E1116R Gigabit PHY> PHY 0 on miibus0
+e1000phy0:  none, 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-master, 1000baseT-FDX, 1000baseT-FDX-master, auto
+uart0: <16550 or compatible> mem 0xf1012000-0xf101201f irq 33 on simplebus0
+uart0: console (1056,n,8,1)
+uart1: <16550 or compatible> mem 0xf1012100-0xf101211f irq 34 on simplebus0
+ehci0: <Marvell Integrated USB 2.0 controller> mem 0xf1050000-0xf1050fff irq 48,19 on simplebus0
+usbus0: EHCI version 1.0
+usbus0: stop timeout
 Marvell>> dhcp 900000
 BOOTP broadcast 1
@@ -102 +171 @@
 usbus0: stop timeout
 usbus0: set host controller mode
+usbus0: <Marvell Integrated USB 2.0 controller> on ehci0
+Fatal kernel mode prefetch abort at 0xffff000c
+trapframe: 0xc0c72b90, spsr=200000d7
+r0 =e5805000, r1 =00000000, r2 =00000000, r3 =00000000
+r4 =00000000, r5 =c35dd1d0, r6 =c35a11a0, r7 =c0a1a93c
+r8 =c35da600, r9 =c0b9a49c, r10=00000000, r11=c0c72bf4
+r12=c0c72bbc, ssp=c0c72bdc, slr=c09e75fc, pc =ffff000c
+
+[ thread pid 0 tid 100000 ]
+Stopped at
 
 }}}