[2] | 1 | # SPIM S20 MIPS simulator.
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| 2 | # The default trap handler for spim.
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| 3 | #
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| 4 | # Copyright (C) 1990-2000 James Larus, larus@cs.wisc.edu.
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| 5 | # ALL RIGHTS RESERVED.
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| 6 | #
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| 7 | # SPIM is distributed under the following conditions:
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| 8 | #
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| 9 | # You may make copies of SPIM for your own use and modify those copies.
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| 10 | #
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| 11 | # All copies of SPIM must retain my name and copyright notice.
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| 12 | #
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| 13 | # You may not sell SPIM or distributed SPIM in conjunction with a commerical
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| 14 | # product or service without the expressed written consent of James Larus.
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| 15 | #
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| 16 | # THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
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| 17 | # IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
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| 18 | # WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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| 19 | # PURPOSE.
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| 20 | #
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| 21 |
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| 22 | # $Header: /cvs/coco08/group6/assignment4/trap.handler,v 1.1 2008/11/06 10:06:41 svhaastr Exp $
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| 23 |
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| 24 |
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| 25 | # Define the exception handling code. This must go first!
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| 26 |
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| 27 | .kdata
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| 28 | __m1_: .asciiz " Exception "
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| 29 | __m2_: .asciiz " occurred and ignored\n"
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| 30 | __e0_: .asciiz " [Interrupt] "
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| 31 | __e1_: .asciiz ""
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| 32 | __e2_: .asciiz ""
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| 33 | __e3_: .asciiz ""
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| 34 | __e4_: .asciiz " [Unaligned address in inst/data fetch] "
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| 35 | __e5_: .asciiz " [Unaligned address in store] "
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| 36 | __e6_: .asciiz " [Bad address in text read] "
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| 37 | __e7_: .asciiz " [Bad address in data/stack read] "
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| 38 | __e8_: .asciiz " [Error in syscall] "
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| 39 | __e9_: .asciiz " [Breakpoint] "
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| 40 | __e10_: .asciiz " [Reserved instruction] "
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| 41 | __e11_: .asciiz ""
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| 42 | __e12_: .asciiz " [Arithmetic overflow] "
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| 43 | __e13_: .asciiz " [Inexact floating point result] "
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| 44 | __e14_: .asciiz " [Invalid floating point result] "
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| 45 | __e15_: .asciiz " [Divide by 0] "
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| 46 | __e16_: .asciiz " [Floating point overflow] "
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| 47 | __e17_: .asciiz " [Floating point underflow] "
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| 48 | __excp: .word __e0_,__e1_,__e2_,__e3_,__e4_,__e5_,__e6_,__e7_,__e8_,__e9_
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| 49 | .word __e10_,__e11_,__e12_,__e13_,__e14_,__e15_,__e16_,__e17_
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| 50 | s1: .word 0
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| 51 | s2: .word 0
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| 52 |
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| 53 | .ktext 0x80000080
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| 54 | .set noat
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| 55 | # Because we are running in the kernel, we can use $k0/$k1 without
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| 56 | # saving their old values.
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| 57 | move $k1 $at # Save $at
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| 58 | .set at
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| 59 | sw $v0 s1 # Not re-entrent and we can't trust $sp
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| 60 | sw $a0 s2
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| 61 | mfc0 $k0 $13 # Cause
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| 62 | sgt $v0 $k0 0x44 # ignore interrupt exceptions
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| 63 | bgtz $v0 ret
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| 64 | addu $0 $0 0
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| 65 | li $v0 4 # syscall 4 (print_str)
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| 66 | la $a0 __m1_
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| 67 | syscall
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| 68 | li $v0 1 # syscall 1 (print_int)
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| 69 | srl $a0 $k0 2 # shift Cause reg
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| 70 | syscall
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| 71 | li $v0 4 # syscall 4 (print_str)
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| 72 | lw $a0 __excp($k0)
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| 73 | syscall
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| 74 | bne $k0 0x18 ok_pc # Bad PC requires special checks
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| 75 | mfc0 $a0, $14 # EPC
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| 76 | and $a0, $a0, 0x3 # Is EPC word-aligned?
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| 77 | beq $a0, 0, ok_pc
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| 78 | li $v0 10 # Exit on really bad PC (out of text)
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| 79 | syscall
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| 80 |
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| 81 | ok_pc:
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| 82 | li $v0 4 # syscall 4 (print_str)
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| 83 | la $a0 __m2_
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| 84 | syscall
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| 85 | mtc0 $0, $13 # Clear Cause register
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| 86 | ret: lw $v0 s1
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| 87 | lw $a0 s2
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| 88 | mfc0 $k0 $14 # EPC
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| 89 | .set noat
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| 90 | move $at $k1 # Restore $at
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| 91 | .set at
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| 92 | rfe # Return from exception handler
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| 93 | addiu $k0 $k0 4 # Return to next instruction
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| 94 | jr $k0
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| 95 |
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| 96 |
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| 97 | # Standard startup code. Invoke the routine main with no arguments.
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| 98 |
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| 99 | .text
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| 100 | .globl __start
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| 101 | __start:
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| 102 | lw $a0, 0($sp) # argc
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| 103 | addiu $a1, $sp, 4 # argv
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| 104 | addiu $a2, $a1, 4 # envp
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| 105 | sll $v0, $a0, 2
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| 106 | addu $a2, $a2, $v0
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| 107 | jal main
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| 108 | li $v0 10
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| 109 | syscall # syscall 10 (exit)
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| 110 |
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| 111 | .globl __eoth
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| 112 | __eoth:
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